1. Field of the Invention
The present invention relates to a semiconductor resistor element and a semiconductor device and more particularly, to a semiconductor resistor element that is able to improve the resistance accuracy, and a semiconductor device using the resistor element, which is preferably applied to an R-2R ladder circuit.
2. Description of the Prior Art
An R-2R ladder circuit has been well known as an essential component of a Digital-to-Analog Converter (DAC) and an Analog-to-Digital Converter (ADC). When the R-2R ladder circuit is realized on a semiconductor device, a plurality of resistor elements are formed on or over a semiconductor substrate and they are electrically interconnected to each other with a patterned conductive layer or layers (i.e., wiring layer or layers). This circuit needs to have a high resistance-ratio accuracy of the resistor elements.
FIG. 1 is a circuit diagram of a conventional 4-bit DAC including the P-2R ladder circuit. In FIG. 1, this DAC comprises four switches S1, S2, S3, ard S4, fourteen resistor elements R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19, a negative power supply terminal 1 to which a negative supply voltage is applied, an operational amplifier 2, an output terminal 3 from which an output voltage V.sub.o is derived, and a constant current sink 4 for sinking a constant current I.sub.o.
Each of the resistor elements R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 serves as a unit resistor.
The switch S1 is switched according to the first bit of a 4-bit input code. The switch S2 is switched according to the second bit of the input code. The switch S3 is switched according to the third bit of the input code. The switch S4 is switched according to the forth bit of the input code. Each of the switches S1, S2, S3, and S4 is electrically connected to the inverting input terminal of the operational amplifier 2 if the corresponding bit is 1, and to the ground if the corresponding bit is 0. In FIG. 1, the switches S1, S2, S3, and S4 are in the state corresponding to the input code [1011], respectively.
Each of the resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 has the same resistance R. These resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 constitute an R-2R ladder circuit 7. The resistor element R9 has a resistance Rr. The resistor element R9 is connected to the output terminal 3 and the inverting input terminal of the amplifier 2. The resistor R9 serves as a feedback resqistor of the amplifier 2. The non-inverting input terminal of the amplifier 2 is electrically connected to the ground.
The resistor elements R10 and R11 are connected in series, serving as a combined resistor element with a resistance 2R. The unconnected end of the resistor R10 is electrically connected to the ground directly. The unconnected end of the resistor R11 is electrically connected to the resistor R6.
The resistor elements R12 and R13 are connected in series, serving as a combined resistor element with a resistance 2R. The unconnected end of the resistor R12 is electrically connected to the inverting input terminal of the amplifier 2 or the ground through the switch S4. The unconnected end of the resistor R13 is electrically connected to the resistor R6.
The resistor elements R14 and R15 care connected in series, serving as a combined resistor element with a resistance 2R. The unconnected end of the resistor R14 is electrically connected to the inverting input terminal of the amplifier 2 or the ground through the switch S3. The unconnected end of the resistor R15 is electrically connected to the connection point of the resistors R6 and R7.
The resistor elements R16 and R17 are connected in series, serving as a combined resistor element with a resistance 2R. The unconnected end of the resistor R16 is electrically connected to the inverting input terminal of the amplifier 2 or the ground through the switch S2. The unconnected end of the resistor R17 is electrically connected to the connection point of the resistors R7 and R8.
The resistor elements R18 and R19 are connected in series, serving as a combined resistor element with a resistance 2R. The unconnected end of the resistor R18 is electrically connected to the inverting input terminal of the amplifier 2 or the ground through the switch S1. The unconnected end of the resistor Rig is electrically connected to the connection point of resistor element R8 and the constant current sink 4.
The combination of the resistor elements R12 and R13 and the corresponding resistor element R6 have a resistance ratio of 2:1. The combination of the resistor elements R14 and R15 and the corresponding resistor element R7 have a resistance ratio of 2:1. The combination of the resistor elements R16 and R17 and the corresponding resistor element R8 have a resistance ratio of 2:1. Thus, the circuits 7 is termed the "R-2R" ladder circuit.
With the conventional 4-bit DAC shown in FIG. 1, a current flowing through the switch S1 is equal to (1/2) I.sub.1 when the first bit of the input code is 1, where I.sub.1 is a current flowing through the resistor elements R10 and R11. A current flowing through the switch S2 is equal to (1/4)I.sub.1 when the second bit of the input code is 1. A current flowing through the switch S3 is equal to (1/8)I.sub.1 when the third bit of the input code is 1. A current flowing through the switch S4 is equal to (1/16)I.sub.1 when the fourth bit of the input code is 1.
Thus, according to the currents flowing through the switches S1, S2, S3, and S4 (in other words, according to the 4-bit digital input code), the output voltage V.sub.o varies stepwise at equal intervals within the range from 0 to [I.cndot.Rr.cndot.(15/16)]. Specifically, the output voltage V.sub.o is equal to 0, [I.cndot.Rr.cndot.((1/16)], [I.cndot.Rr.cndot.(2/16)], [I.cndot.Rr.cndot.(3/16)], [I.cndot.Rr.cndot.(4/16)], [I.cndot.Rr.cndot.(5/16)], [I.cndot.Rr.cndot.(6/16)], [I.cndot.Rr.cndot.(7/16)], [I.cndot.Rr.cndot.(8/16)], [I.cndot.Rr.cndot.(9/16)], [I.cndot.Rr.cndot.(10/16)], [I.cndot.Rr.cndot.(11/16)], [I.cndot.Rr.cndot.(12/16) ], [I.cndot.Rr.cndot.(13/16)], [I.cndot.Rr.cndot.(14/16)], or [I.cndot.Rr.cndot.(15/16)].
To improve the accuracy of the resistance ratio of 2:1, i.e., to improved the digital-to-analog conversion accuracy, for example, the conventional R-2R ladder circuit of FIG. 1 is realized on a semiconductor device having the configuration as shown in FIGS. 2 and 3. This configuration was disclosed in the Japanese Examined Patent Publication No. 2-28269 published in June, 1990.
As shows in FIG. 2, the thirteen resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 constituting the R-2R ladder circuit 7 have the same elongated (or, strip-like) plan shape. They are arranged in parallel at regular intervals.
Specifically, in FIG. 2, the resistor element R8 is located in the central position of the ladder circuit region. The resistor element R7 is located on the left-hand side of the resistor element R8 to be apart from a specific interval. Similarly, the resistor elemerts R18, R16 , R14 , R12 , and R10 are successively arranged at the same interval as that of the resistor elements R7 and R8 on the left-hand side of the resistor element R7.
On the other hand, the resistor element R6 is located on the right-hand side of the resistor element R8. Similarly, the resistor elements R19, R17, R15, R13, and R11 are successively arranged at the same interval as that of the resistor elements R6 and R8 on the right-hand side of the resistor element R6.
Thus, the group of the resistor elements R7, R18, R16, R14, R12, and R10 and the group of the resistor elements R6, R19, R17, R15, R13, and R11 are symmetrically laid out with respect to the central resistor element R8.
To realize the function of the ladder circuit 7, the resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 are electrically connected with the use of conductive wiring layers 117a, 117b, 117c, 117d, 117e, 117f, 117g, 117h, 117i, 122a, 122b, 122c, 122d, 122e, 122f, and 122g. The wqiring layers 122a, 122b, 122c, 122d, and 122e are symmetrically laid out with respect to the central resistor element R8.
The resistor element RB is electrically connected to the resistor alement R17 by the wiring layer 117h. Further, the resistor element R8 is electrically connected to the resistor element R19 by the wiring layer 122f and to the constant current sink 4 by the wiring layer 117g.
The resistor element R7 is electrically connected to the resistor element R6 by a wiring layer 117f and to the resistor element R15 by a wiring layer 122g. Further, the resistor element R7 is electrically connected to the resistor elements R8 and R17 by the wiring layer 117h.
The resistor element R6 is electrically connected to the resistor elements R11 and R13 by the wiring layer 117i. Further, the resistor element R6 is electrically connected to the resistor element R15 by the wiring layers 117f and 122g.
The resistor elements R10 and R11 are electrically connected to each other by the wiring layer 122a. The resistor elements R12 and R13 are electrically connected to each other by the wiring layer 122b. The resistor elements R14 and R15 are electrically connected to each other by the wiring layer 122c. The resistor elements R16 and R17 are electrically connected to each other by the wiring layer 122d. The resistor elements R18 and R19 are electrically connected to each other by the wiring layer 122e.
The resistor element R10 is electricalIy connected to the ground by the wiring layer 117a. The resistor element R12 is electrically connected to the switch S4 by the wiring layer 117b. The resistor element R14 is electrically connected to the switch S3 by the wiring layer 117c. The resistor element R16 is electrically connected to the switch S2 by the wiring layer 117d. The resistor element R18 is electrically connected to the switch S1 by the wiring layer 117e.
The resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 constituting the R-2R ladder circuit 7 have the same structure. Therefore, only the resistor element R8 is explained with reference to FIG. 3.
In FIG. 3, an isolation dielectric layer 113 is selectively formed by a thermal oxidaticnprocess on a main surface of a semiconductor substrate 109 of a first conductivity type. A resistor region 112 with the elongated plan shape as shown in FIG. 2 is selectively formed in the surface area of the substrate 109 by a diffusion or ion-implantation process of suitable dopant atoms of a second conductivity type. A pair of contact regions 111a and 111b are formed in the surface area of the substrate 109 to be contacted with the respective ends of the resistor region 112 by a diffusion or ion-implantation process of suitable dopant atoms of the second conductivity type.
A comparatively thick insulating layer 114 (for example, with a thickness of approximately 1 .mu.m) is formed to cover the resistor region 112, the pair of contact regions 111a and 111b, and the isolation dielectric layer 113. The layer 114 has a pair of contact holes 115a and 115b at corresponding positions to the pair of contact regions 111a and 111b.
The wiring layer 122f is contacted with and electrically connected to the underlying contact region 111a through the contact hole 115a. The wiring layer 117h is contacted with and electrically connected to the underlying contact region 111b through the contact hole 115b.
The wiring layers 117a, 117b, 117c, 117d, 117e, 117f, 117g, 117h, and 117i are made of aluminum (Al) and located over the isolation dielectric layer 113 and/or the contact regions 111a and 111b. The wiring layers 122a, 122b, 122c, 122d, 122e, 122f, and 122g are made of aluminum and located over the resistor regions 112 for the purpose of a higher scale of integration.
The resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19 tend to have some deviation in resistance value from the designed value, which is caused by the thermal distribution unevenness within the ladder circuit region, the distribution unevenness of the diffused or ion-implanted dopant atoms within the ladder circuit region, or the Piezo effect. However, because of the above symmetrical layout of the resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19, the resistance deviation is almost all canceled to each other, thereby improving the relative accuracy in resistance value.
With the conventional semiconductor device show in FIGS. 2 and 3, although the comparative thick irisulating layer 114 is formed to cover the resistor elements R6, R7, R8, R10, R11, R12, R13, R14, R15, R16, R17, R18, and R19, a problemn that the resistance of the resistor regions 112 tends to fluctuate dependent upon the electric potential applied to the wiring layers 122a, 122b, 122c, 122d, 122e, 122f, and 122g located over the resistor regions 112 will occur. The reason is as follows.
Generally, when a voltage is applied to the surface of a semiconductor through an oxide layer, the carrier concentration in the semiconductor is changed, resulting in electric resistance change of the semiconductor.
The threshold voltage V.sub.T at which an inversion layer starts to be generated in the surface of the semiconductor is given by the following expression ##EQU1## where .di-elect cons..sub.S is the dielectric constant of the semiconductor, q is the charge of an electron, N.sub.B is the doping concentration of the semiconductor, .psi..sub.B is the electric potential difference from the center of the bandgap to the Fermi level in the semiconductor, and C.sub.1 is the capacitance of the oxide layer.
It is seen from the expression (1) that the threshold voltage V.sub.T becomes higher as the doping concentration of the semiconductor N.sub.B increases. This means that the fluctuation of the carrier concentration (i.e., the resistance) in the surface of the semiconductor is suppressed if the doping concentration of the semiconductor N.sub.B is high.
Further, the capacitance C.sub.1 of the oxide layer is given by the following expression (2) ##EQU2## where .di-elect cons..sub.OX is the dielectric constant of the oxide layer, and t.sub.OX is the thickness thereof.
It is seen from the expressions (2) and (1) that the threshold voltage V.sub.T becomes higher as the thickness t.sub.OX of the oxide layer increases. This means that the fluctuation of the carrier concentration (i.e., the resistance) in the surface of the semiconductor is suppressed if the thickness t.sub.OX of the oxide layer increases.
With the conventional semiconductor device shown in FIGS. 2 and 3, when the doping concentration of the resistor regions 112 is low, the sheet resistance of the resistor regions 112 is comparatively high. For example, it is 1 to 10 k.OMEGA./.hoarfrost.. In this case, as seen from the above expression (1), the resistor regions 112 tend to be affected by the applied voltage, resulting in large resistance fluctuation dependent upon the applied voltage. The voltage dependence of the resistance of the resistor regions 112 is, for example, approximately 0.1%/V.
If the resistor elements having the voltage dependence of approximately 0.1%/V are used for a R-2R ladder circuit in a 9-bit DAC, the output voltage change per bit of this DAC will be 0.2%, because (1/2.sup.9).times.100=0.2. This means that the conversion accuracy of this DAC is largely affected by the voltage dependence of the resistance.
To solve the above problem of the resistance deviation due to the applied voltage to the wiring layers, an improvement that a heavily doped region is additionally formed in the overlapped part of a resistor region and a wiring layer was developed. This imuprovement was disclosed in the Japanese Non-Examined Patent Publication No. 58-10851 published in January, 1983.
In this improvement, the heavily doped region is provided in the overlapped part of the resistor region and as a result, the carrier concentration in the surface of the heavily doped region exhibits almost no change even if the applied voltage to the wiring layer varies. Consequently, the resistance deviation of the resistor region can be suppressed.
However, with the improved configuration disclosed in the Japanese Non-Examined Patent Publication No. 58-10851, the following problem will occur.
Specifically, since the heavily doped region serves as a part of the resistor region, it increases the resistance value of the resistor element. The heavily doped region typically has a sheet resistance of several tens .OMEGA./.quadrature.. Therefore, if the resistance increase due to the addition of the heavily doped region is 20 .OMEGA. and the designed or wanted resistance of the resistor element is 10 k.OMEGA., the resistance increase will be 0.2% with respect to the designed resistance value, because (20/10k).times.100 =0.2. This means that the resistance increase due to the heavily doped region largely affects the conversion accuracy of the DAC.